Computer Organization

How computers work inside, taught with RISC-V: abstraction layers and performance with the CPU time equation and Amdahl's law, integers, overflow and RISC-V's flag-free arithmetic, IEEE 754 floating point, UTF-8 and byte order, gates, adders, the ALU and the register file, the RV32I instruction set and its encodings, assembly programming with loops, arrays and jump tables, procedures and the calling convention, the compiler, assembler, linker and loader, a single-cycle datapath and its control, pipelining, hazards and branch prediction, caches, virtual memory, I/O and parallel hardware, with every assembly example assembled by LLVM and run on a RISC-V simulator.

CMPUT-229 Year 2 3 credits 12 lessons · 6 h 23 min

Offered by HSM University · Computing Science

What you'll learn

  • Describe the layers of a computer system and the role of the instruction set architecture, and evaluate performance with the CPU time equation, Amdahl's law and the power equation.
  • Represent integers in unsigned and two's complement form, distinguish carry from overflow, apply sign and zero extension, shifts and masks, and explain how RISC-V multiplies and divides.
  • Encode and decode IEEE 754 floating-point values, explain rounding, special values and their consequences for programs, and describe UTF-8 text and little- and big-endian byte order.
  • Design combinational and sequential circuits from Boolean expressions, including adders, an ALU, a register file and a finite state machine, and compute a clock period from path delays.
  • Explain the RV32I registers, calling convention, instruction groups and six instruction formats, encode and decode instructions, and build large constants with lui, addi and auipc.
  • Write RISC-V assembly programs that use directives, loads and stores, branches, loops, jump tables and string processing, and read compiler-generated code for the same constructs.
  • Write procedures that follow the RISC-V calling convention, with correct prologues, epilogues and stack frames, including nested, recursive and tail calls, and explain stack-based attacks.
  • Trace a program through the compiler, assembler, linker and loader, interpret IR, object files, symbols, relocations and program headers, and compare code generated for RISC-V and x86-64.
  • Construct a single-cycle RV32I datapath, specify its control signals for each instruction class, trace instructions through it and analyze its timing.
  • Explain five-stage pipelining, identify structural, data and control hazards, and evaluate forwarding, stalling, instruction scheduling and branch prediction quantitatively.
  • Analyze the memory hierarchy: split addresses into tag, index and offset, simulate direct-mapped and set-associative caches, compute AMAT and write cache-friendly code.
  • Explain virtual memory with page tables and TLBs, exceptions and privilege modes, memory-mapped I/O, interrupts and DMA, and vector and multicore parallelism, and trace one program through every layer.

Course content

12 lessons · 6 h 23 min total · final exam

  1. 1 Abstraction layers and computer performance 37 min · quiz
  2. 2 Data representation I: integers and arithmetic 30 min · quiz
  3. 3 Data representation II: floating point, characters and endianness 33 min · quiz
  4. 4 Digital logic for computer architects 31 min · quiz
  5. 5 Instruction set architecture and RISC-V basics 32 min · quiz
  6. 6 Assembly programming: control flow, arrays and memory 29 min · quiz
  7. 7 Procedures, the stack and calling conventions 29 min · quiz
  8. 8 From C to machine code 33 min · quiz
  9. 9 Processor design: the single-cycle datapath and control 31 min · quiz
  10. 10 Pipelining and hazards 33 min · quiz
  11. 11 The memory hierarchy: caches 30 min · quiz
  12. 12 Virtual memory, input/output and parallelism 35 min · quiz
  13. E Final exam 20 questions

Requirements

Recommended background. You can start any course at any time.

Description

How computers work inside, taught with RISC-V: abstraction layers and performance with the CPU time equation and Amdahl's law, integers, overflow and RISC-V's flag-free arithmetic, IEEE 754 floating point, UTF-8 and byte order, gates, adders, the ALU and the register file, the RV32I instruction set and its encodings, assembly programming with loops, arrays and jump tables, procedures and the calling convention, the compiler, assembler, linker and loader, a single-cycle datapath and its control, pipelining, hazards and branch prediction, caches, virtual memory, I/O and parallel hardware, with every assembly example assembled by LLVM and run on a RISC-V simulator.

Part of the Science stream, typically taken in year 2.