Digital Logic Design

Number systems, Boolean algebra, CMOS gates, Karnaugh maps, combinational building blocks and arithmetic circuits, flip-flops, registers and counters, finite state machines, timing and synchronization, and Verilog on FPGAs.

ELE-210 Year 2 3 credits 12 lessons · 4 h 42 min ▶ Video lessons coming soon

Offered by HSM University · Electrical Engineering

This is the American version of this course. See the Canadian version.

What you'll learn

  • Explain why digital systems use two-valued signals, distinguish combinational from sequential circuits, and convert numbers between binary, octal, decimal and hexadecimal.
  • Add and subtract in binary, represent signed numbers in two's complement, detect unsigned and signed overflow, and use BCD, Gray code, ASCII and parity.
  • Apply the laws of Boolean algebra and De Morgan's theorems, build truth tables, and write functions in canonical sum-of-products and product-of-sums form.
  • Draw and read gate symbols, implement any function with NAND or NOR gates alone, explain CMOS gate structure, and calculate noise margins and dynamic power.
  • Minimize functions of up to four variables with Karnaugh maps, using prime and essential prime implicants and don't-care conditions, and describe the Quine-McCluskey method.
  • Use multiplexers, decoders, encoders, priority encoders and seven-segment decoders, and implement logic functions with multiplexers and decoders.
  • Design half adders, full adders, ripple-carry and carry-lookahead adders, adder-subtractors, comparators and a simple ALU, and estimate adder delay.
  • Explain how latches and flip-flops store data, and use SR, D, JK and T devices with their characteristic and excitation tables and asynchronous inputs.
  • Design registers, shift registers, ring and Johnson counters, synchronous binary and modulo-N counters, and apply counters to timing and frequency measurement.
  • Specify, design and implement Moore and Mealy finite state machines, choose a state encoding, and make unused states safe.
  • Analyze propagation and contamination delay, setup and hold constraints, clock skew and hazards, and synchronize asynchronous inputs and clock-domain crossings.
  • Describe combinational and sequential circuits in Verilog, write a simple testbench, and explain how FPGAs and the synthesis flow implement a design.

Course content

12 lessons · 4 h 42 min total · final exam

  1. 1 Digital systems and number systems 23 min · quiz
  2. 2 Binary arithmetic and codes 23 min · quiz
  3. 3 Boolean algebra 24 min · quiz
  4. 4 Logic gates and CMOS 24 min · quiz
  5. 5 Karnaugh maps and minimization 28 min · quiz
  6. 6 Combinational building blocks 23 min · quiz
  7. 7 Arithmetic circuits 23 min · quiz
  8. 8 Latches and flip-flops 22 min · quiz
  9. 9 Registers and counters 21 min · quiz
  10. 10 Finite state machines 23 min · quiz
  11. 11 Timing and clocking 26 min · quiz
  12. 12 Hardware description languages and programmable logic 22 min · quiz
  13. E Final exam 20 questions

Description

Number systems, Boolean algebra, CMOS gates, Karnaugh maps, combinational building blocks and arithmetic circuits, flip-flops, registers and counters, finite state machines, timing and synchronization, and Verilog on FPGAs.

Part of the Engineering stream, typically taken in year 2.